Intel XScale
The Intel® XScale™ micro-architecture is based on a new core which is compliant with ARM version 5TE. The micro-architecture surrounds the core with instruction and data memory management units; instruction, data, and mini-data caches; write, fill, pend, and branch target buffers; power management, performance monitoring, debug, and JTAG units; coprocessor interface; 32K caches; MMUs; BTB; MAC coprocessor; and core memory bus.
Digital Semiconductor, DEC's chip division which designed the StrongARM on licence with ARM, was sold to Intel as part of a lawsuit settlement. Intel used the StrongARM to replace their ailing line of outdated RISC processors, the i860 and i960.
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